1. Field of the Invention
The present invention relates to network interface devices for interconnecting host processors with a communication network, and more particularly to providing for efficient utilization of host memory supported by high speed, and/or embedded hardware at the network interface.
2. Description of Related Art
Network interface cards (NIC) are often be used for network connection between a host system and a network medium. NICs have integrated circuits with buffer memory for storing packets in transit. For outgoing traffic, the packets being downloaded from host memory via the host bus system go through a transmit packet data buffer and medium access control MAC unit to be transmitted onto the wire, optical fiber, or antenna (or otherwise transmitted on a network medium). For incoming traffic, the packet being received from the network medium can go through the MAC unit and a receive packet data buffer to be uploaded into host memory.
Packets arrive at the network interface at rates that vary over time, and according to some protocols, without prior notification of the host system. Drivers running in the host system are designed to prepare for the packet flow, and to respond to messages from the interface relating to incoming packets. In order to prepare for receiving such packets from the network, the drivers in the host systems typically allocate memory in advance to act as buffers into which incoming packets can be stored. In some systems, lists of descriptors, called receive buffer descriptors herein, for the buffers are prepared by the drivers, to be used in the process of uploading packets into the allocated buffers.
In one approach, a receive buffer descriptor ring is used to store receive buffer descriptors (RBD). Each RBD consists of the address and length of the receive buffer in host memory. These buffers can be used to store the uploaded packets in host memory after they have been received in buffer memory on the interface. The buffers are usually defined to have a buffer size equal to the maximum packet size for standard packets according to the protocol in use. For example, for Ethernet networks the maximum standard packet size is 1.5 kilobytes. Therefore, in the typical system, all receive buffers to the network consume 1.5 kilobytes. However, the minimum valid packet size is 64 bytes. A 64 byte packet may be allocated to a receive buffer that is 1.5 kilobytes, wasting most of the host memory space for the buffer. Allocating buffers in advance simplifies and speeds up the process of uploading packets into the host system. However, to the extent that packets are received that have less than the maximum standard packet size, host memory resources are wasted.
In order to improve system throughput and reduce CPU utilization in networks characterized by transfers of large files, “jumbo” packets can be used which have a packet size greater than the maximum standard packet size for the protocol. For example, “jumbo” packets having a 9 kilobyte size and a 16 kilobyte size have been implemented. Jumbo packets can be mixed with normal packets on the network, and their order can be completely random. Therefore, receive buffers in such systems have been defined to handle the maximum size of the jumbo packet. This exacerbates the inefficiency of prior art systems for allocating receive buffers in advance, causing inefficient use of host memory.
With 100 Megabit, Gigabit and higher wire speeds, combined with jumbo packet sizes, it becomes even more difficult to manage memory allocation.
It is desirable to provide a network interface capable of receiving packets having widely varying sizes, with efficient management of host memory resources in high speed network systems.